With the recent development of wireless mobile communication, the importance of RF application devices has increased. Accordingly, an accumulation mode MOS varactor has been used in applications requiring a wide tuning range such as with a Voltage Controlled Oscillator (VCO). In an environment in which supply voltage becomes lower as technology develops, the properties of a MOS varactor, such as its high quality, extended tuning range, low noise and low consumption power, fully show the usefulness thereof.
Such a MOS varactor has been designed through mathematical nonlinear modeling.
FIGS. 1 and 2 are diagrams schematically illustrating the general structure of a MOS varactor, which show a structure for extracting model parameters in the mathematical nonlinear modeling of the MOS varactor.
As expressed by equation 1 below, a conventional MOS varactor model equation includes parameters Cgmin0 and dCg0 for the size of a C-V curve and parameters dVgs0 and Vgnorm for the slope of the curve, and extracts the parameters from the structure of a single size.
                              C          gate                =                              C                          gmin              ⁢                                                          ⁢              0                                +                                    dC              go                        ×                                          [                                  1                  +                                      tanh                    ⁡                                          (                                                                                                    V                            g                                                    -                                                      dV                                                          gs                              ⁢                                                                                                                          ⁢                              0                                                                                                                                V                          gnorm                                                                    )                                                                      ]                            .                                                          Equation        ⁢                                  ⁢        1        ⁢                  :                    
In equation 1, the parameters Cgmin0, dCg0, dVgs0 and Vgnorm denote gate capacitance coefficients, and Vg denotes gate voltage applied from an external source. Such a MOS varactor model equation shows high accuracy for a single area, but shows low accuracy when the same parameters are applied to elements having different areas.
FIGS. 3 to 7 are graphs illustrating comparisons of the differences between values estimated by the conventional MOS varactor model equation and actually measured values, and show gate capacitance values for an applied gate voltage.
FIG. 3 is a graph reflecting the comparison when a width W, a length L and the number N of fingers are 2 μm, 1 μm and 60, respectively. Here, the total area of the gate is 120 μm2. As illustrated in FIG. 3, it can be seen that a large error occurs towards both ends of the S-shaped curve, and the measured RMS error is 5.43%. The measured values are expressed by dots and the values estimated by the conventional MOS varactor model equation are expressed by a solid line.
FIG. 4 is a graph reflecting the comparison when a width W, a length L and the number N of fingers are 5 μm, 1 μm and 48, respectively. Here, the total area of the gate is 240 μm2. As illustrated in FIG. 4, it can be seen that a large error occurs towards both ends of the S-shaped curve, and the measured RMS error is 7.28%. The measured values are expressed by dots and the values estimated by the conventional MOS varactor model equation are expressed by a solid line.
FIG. 5 is a graph reflecting the comparison when a width W, a length L and the number N of fingers are 5 μm, 2 μm and 48, respectively. Here, the total area of the gate is 480 μm2. As illustrated in FIG. 5, it can be seen that a large error occurs towards both ends of the S-shaped curve, and the measured RMS error is 5.85%. The measured values are expressed by dots and the values estimated by the conventional MOS varactor model equation are expressed by a solid line.
FIG. 6 is a graph reflecting the comparison when a width W, a length L and the number N of fingers are 10 μm, 1 μm and 96, respectively. Here, the total area of the gate is 960 μm2. As illustrated in FIG. 6, it can be seen that a large error occurs towards both ends of the S-shaped curve, and the measured RMS error is 7.97%. The measured values are expressed by dots and the values estimated by the conventional MOS varactor model equation are expressed by a solid line.
FIG. 7 is a graph reflecting the comparison when a width W, a length L and the number N of fingers are 10 μm, 2 μm and 96, respectively. Here, the total area of the gate is 1920 μm2. As illustrated in FIG. 7, it can be seen that a large error occurs towards both ends of the S-shaped curve, and the measured RMS error is 11.52%. The measured values are expressed by dots and the values estimated by the conventional MOS varactor model equation are expressed by a solid line.
According to the conventional MOS varactor model equation as described above, it is difficult to simultaneously satisfy various sizes of capacitors in one model. Therefore, it is necessary to perform modeling according to sizes of the capacitors.